freq_shift

class caf_verilog.freq_shift.FreqShift(x, freq_res, fs, n_bits, i_bits=12, q_bits=0, neg_shift=False, output_dir='.')[source]

Bases: CafVerilogBase

gen_tb(freq=None)[source]
params_dict() dict[source]
template_dict()[source]
write_freq_shift_tb_module(freq=None)[source]
write_module()[source]

Generate the module. :return:

async caf_verilog.freq_shift.capture_test_output_data(dut)[source]
caf_verilog.freq_shift.freq_res(foas: list) float[source]
async caf_verilog.freq_shift.send_test_input_data(dut, x)[source]