cpx_multiply

class caf_verilog.cpx_multiply.CpxMultiply(x, y, x_i_bits=12, x_q_bits=0, y_i_bits=12, y_q_bits=0, output_dir='.')[source]

Bases: CafVerilogBase

gen_quantized_output()[source]

Perform the multiplication and then quantize to the closest representation of what the verilog module should produce for the given bit length.

Returns:

gen_tb()[source]

Generate a test bench using quantized values.

Returns:

params_dict() → dict[source]
template_dict(inst_name=None)[source]
write_cpx_multiply_tb_module()[source]

Write out a testbench file to test the cpx_multiply module.

Returns: